How to Do High-Side Current Sensing? Shunt Value, Isolated Amplifier and Isolated Σ-Δ
Bottom line: the selection order for high-side current sensing is set the sensing position and full-scale current first → trade off the shunt by P=I²R and match the linear-input range grade (±50mV / ±250mV) → decide isolated amplifier vs isolated Σ-Δ modulator → check isolation rating and creepage → finally check whether bandwidth and delay can keep up with the protection loop and whether there is a fail-safe output. HOPERF CMT1300 is an isolated amplifier for this position: ±50mV / ±250mV two linear-input grades, fixed gain 8.2 or 41, typical SNR 86dB, typical bandwidth 310kHz, and a fail-safe output with VDD1 under-voltage and input common-mode over-voltage detection. A too-large shunt heats and drifts, a too-small one lacks SNR — this isolator is set together with the shunt. Parameters are from HOPERF official materials as typical values or range examples; follow the original datasheet.
flowchart TD
A["Set sensing position<br/>high-side shunt / low-side / Hall"] --> B["Set full-scale current<br/>and required accuracy grade"]
B --> C["Trade off shunt by P=I²R<br/>then match ±50mV / ±250mV grade"]
C --> D{"Analog output<br/>or digital bitstream?"}
D -- "Straight into MCU ADC" --> E["Isolated amplifier<br/>CMT1300"]
D -- "MCU-side digital filtering" --> F["Isolated Σ-Δ modulator<br/>CMT130X"]
E --> G["Check isolation rating and creepage<br/>test value ≠ operating isolation voltage"]
F --> G
G --> H["Check bandwidth and total delay<br/>over-current protection loop time budget"]
H --> I["Check fail-safe output<br/>and secondary isolated supply"]First, two high-frequency questions
Q: Can't current sensing be on the low side? Why must it be high side?
Which side depends on two constraints: common-mode voltage and safety isolation. Low-side sensing (shunt between load and ground) has low common-mode, needs no isolation and is easy to make accurate — low-voltage control boards below 48V often do this. But the bus of energy storage, PCS and high-voltage BMS is a floating potential of hundreds to over a thousand volts relative to control ground: a high-side sense point has common-mode so high that a non-isolated op-amp cannot touch it; a low-side point often breaks the safety isolation structure (control side shares reference ground with the high-voltage domain), and low-side sensing cannot catch faults like "load-side short, current returns without passing the shunt". So the mainstream practice for high-voltage-domain systems is — keep the shunt on the high side and use one isolator to send the millivolt signal across the barrier to the low-side MCU. The full list of which positions must be isolated is in Which positions in an energy-storage system need isolation?.
Q: The isolator after the shunt — what exactly sets it?
Set by four things: range grade (follows the shunt full-scale drop), output form (analog or digital bitstream), delay and bandwidth (can it keep up with the over-current protection loop), diagnostic ability (is the output a definite state after failure). Each is broken down below by selection order.
Step 1: set the sensing position and method
| Method | Typical implementation | Accuracy / bandwidth | Trade-off |
|---|---|---|---|
| High-side shunt + isolator | shunt + isolated amplifier / isolated Σ-Δ modulator | high accuracy, good bandwidth; must handle offset and temp drift | mainstream for tens to hundreds of A, must solve isolation and common mode |
| Low-side shunt (non-isolated) | op-amp + MCU ADC direct | high accuracy, no barrier | only for low-voltage common-ground systems; fails high-voltage-domain safety isolation |
| Hall current sensor | integrated Hall IC / open-loop closed-loop module | inherent isolation; medium accuracy, zero drift and temp drift to handle | kA-level large current, fully isolated primary/secondary; bandwidth and accuracy weaker than shunt |
| Fluxgate / current transformer | fluxgate module / CT | fluxgate high accuracy; CT AC only | high-end metering and AC-side current detection |
Two criteria worth remembering: first, current magnitude — shunt-route power grows by I²R, the larger the bus current the harder it gets, kA-level usually turns to Hall; second, AC or DC — a CT cannot measure the DC component, and the DC component of BMS and storage bus must go through a shunt or Hall.
Step 2: shunt value — power vs accuracy trade-off
The shunt carries two pulling metrics: larger drop → better SNR → easier accuracy, but larger drop → power grows by I²R → heating, temp drift, resistance shift. So the right move is not "what resistance", but first "what full-scale drop", then back-solve:
R = full-scale drop / full-scale current
P = I² × R (power on the shunt)This thinking directly decides the range grade. For a 100A full scale (engineering estimate):
| Shunt | Drop at 100A | Shunt power P=I²R | Matching range grade |
|---|---|---|---|
| 0.5mΩ | 50mV | ~5W | ±50mV grade (full at ±100A) |
| 0.1mΩ | 10mV | ~1W | ±50mV grade (full scale up to ±500A) |
| 2.5mΩ | 250mV | ~25W | ±250mV grade (full at ±100A) |
| 1mΩ | 100mV | ~10W | ±250mV grade (full scale up to ±250A) |
This table gives a direct conclusion: for the same 100A full scale, the ±250mV grade needs 5x the resistance and 5x the power. So the larger the bus current, the more you should prefer the low-range grade (±50mV), using a smaller resistance to push power down; the cost is a drop of only tens of millivolts, where offset voltage, noise, temperature drift and PCB thermoelectric potential directly eat the accuracy budget, so you must pick a low-offset low-drift sensing device and do Kelvin connection and temperature compensation.
Conversely, medium-small current (a few to tens of A) is more comfortable with the ±250mV grade: larger drop, easier SNR, looser requirement on device offset. The above is an engineering estimate; actual value also considers the shunt temp-drift coefficient, cooling and ADC effective bits, following the datasheet and whole-system measurement.
Step 3: isolated amplifier or isolated Σ-Δ modulator
| Item | Isolated amplifier (CMT1300) | Isolated Σ-Δ modulator (CMT130X) | How to choose |
|---|---|---|---|
| Output form | secondary differential analog voltage | 1-bit digital bitstream | straight into MCU ADC → former; MCU-side sinc filter → latter |
| Accuracy and immunity | typical SNR 86dB, typical bandwidth 310kHz | digital transmission more immune, precision can be higher | metering-grade (SOC / SOH) leans Σ-Δ; protection and loop control lean amplifier |
| Delay | small analog-link delay | decimation-filter group delay clearly larger | over-current protection must count total delay, delay-sensitive leans amplifier |
| Design complexity | low (use as isolated analog front-end) | high (needs digital filter and clock design) | fast validation and small/medium batch lean amplifier |
CMT1300 input range has two grades, directly corresponding to the Step-2 shunt logic:
| Model | Linear input range | Fixed gain | Corresponding shunt logic |
|---|---|---|---|
| CMT1300D05 | ±50mV | 8.2 or 41 (by model) | large-current bus: small resistance, low power, stricter on offset and noise |
| CMT1300D25 | ±250mV | 8.2 or 41 (by model) | medium-small current: larger resistance allowed, easier SNR |
The meaning of fixed gain is to set the secondary output swing into the MCU ADC input range (e.g. 0~3.3V) — gain and input range must be checked as a pair; do not apply the ±50mV grade gain to the ±250mV range or the secondary saturates first at full scale and the waveform clips. Also CMT1300 is a fully differential input sampled by an on-chip Σ-Δ modulator and transmitted across the barrier, then differentially output after a fourth-order analog filter on the secondary architecture: the digital isolation is already inside, giving you a clean analog output on the secondary — this is the architectural difference between "isolated Σ-Δ modulator + secondary filter" and "isolated amplifier": the former hands the bitstream straight to the MCU for filtering (designer controls filter and delay), the latter does the filtering in the chip (designer gets a ready analog output).
Step 4: check isolation rating and creepage
Sensing isolation spans the high-voltage bus domain and the low-voltage control domain — it is safety-related isolation, harder than functional isolation:
- Isolation rating test value ≠ long-term operating voltage: a 5kVrms-class number is the UL1577 component-certification test value (about one minute of applied voltage without breakdown); to check the system bus use the datasheet operating isolation voltage (e.g. isolated CAN transceiver CMT1042 ~1060Vrms, isolated driver CMT8602X up to 1500VDC between secondaries). Never mix the two views; details in What does 5kVrms on an isolator mean (isolation rating)?.
- Creepage and clearance are set by package: the difference between narrow (3.75kVrms / 3kV class) and wide (5kVrms class) is not just the number but whether the safety table can be passed — when a whole-system goes for IEC 62368-1, GB 4943.1 certification, you often must fix the package before talking about the rating.
- PCB under the barrier must be clear: copper, traces or vias crossing the isolation gap shorten the effective creepage; a prototype passes but safety test fails, usually right here. Cross-barrier layout rules are in the next isolation-barrier PCB-layout topic (I8).
Step 5: check bandwidth and total delay, over-current protection loop must be totaled
Bandwidth decides "how fast a change can be truly sampled", delay decides "how long from occurrence to action". CMT1300 typical bandwidth 310kHz is enough for line frequency and ordinary current loops, but a fast loop like short-circuit protection must be budgeted across the whole chain:
total protection response delay ≈ sensing device delay + transmission delay + ADC/comparator + MCU decision + drive and relay actionThe Σ-Δ decimation-filter group delay in the sense chain is the easiest to miss — if the MCU side uses a high-order sinc filter for precision, group delay can reach milliseconds, and the short-circuit current has already peaked in that time. The engineering approach is split precision and protection into two paths: the protection threshold goes through analog output or comparator straight-through (fast), the metering value goes through digital filtering (accurate). Also verify by actual condition: the parasitic inductance of shunt and traces produces extra drop under large di/dt, showing a spike on the sense waveform — this is a layout problem and cannot be hidden by more filtering.
Step 6: fail-safe output and secondary isolated supply
Fail-safe output means that when the isolated sensing chain has an internal fault, the output falls to a definite, system-recognizable state instead of giving a "seemingly normal but actually wrong" small current value. This directly concerns safety on a BMS and energy-storage PCS: if the secondary supply is under-voltage or the primary input common-mode is over-voltage yet the output still sits near zero, the upper layer reads the real fault as "bus has no current".
CMT1300 has VDD1 under-voltage detection and input common-mode over-voltage detection, giving a fail-safe output on trigger. Three matched design items:
- Connect the diagnostic pin into the MCU and write it into the state machine, do not float it — a fail-safe output not connected equals none;
- Define the post-failure action at the system level: BMS fail-safe logic (e.g. hope to disconnect for safety) and some industrial-control fail-safe logic (hope to keep running to avoid stop) may point opposite ways, and must be set by whole-system failure analysis;
- The secondary must have an isolated supply meeting creepage and rating: an unstable supply makes the diagnostic repeat-trigger, and capacity and decoupling must cover the sensing device power and transients. How to design the on-board isolated auxiliary supply is in How to make an on-board auxiliary supply?.
Common pitfalls
| Pit | Phenomenon | Correct approach |
|---|---|---|
| Shunt only by resistance not power | shunt heats, temp drift drifts current reading | double-check with R=full-scale drop/full-scale current + P=I²R, large current prefers ±50mV low range |
| Gain and range grade unpaired | secondary clips at large current, reading caps | check fixed gain and input range as a pair, back-solve by MCU ADC input range |
| Treat isolation test value as operating voltage | looks enough, safety/long-term reliability fails | check bus voltage by operating isolation voltage, test value only for certification |
| Σ-Δ group delay not in protection loop | short-circuit protection one beat slow, switch damaged by large current | split precision and protection: protection straight-through analog/comparator, metering digital filter |
| Copper or traces under barrier | prototype OK, safety creepage fails | strict clearance across barrier, creepage by standard table |
| Fail-safe output floated | sensing failure read as "no current", fault hidden | connect diagnostic pin to MCU and define system-level failure action |
Related solutions
- Full isolator family selection: How to select digital isolators?
- Isolation position planning: Which positions in an energy-storage system need isolation?
- Isolation rating dual view: What does 5kVrms on an isolator mean (isolation rating)?
- Isolated gate-driver selection: How to select an isolated gate driver?
- Optocoupler to digital isolator migration: Can an optocoupler be replaced directly by a digital isolator?
- Isolator and TVS division: How to select isolated CAN and RS-485 transceivers?, RS485 / CAN communication port keeps failing — what to do?
- Secondary isolated supply design: How to make an on-board auxiliary supply?
- Main-loop MOS and voltage window: How to select BMS protection-board charge/discharge MOS?, How to compute TVS and MOS voltage window for a 23 / 24-cell pack?
- Shunt heating and junction-temperature check: What to do when IGBT / MOSFET heating is severe?
- BMS sensing and balancing coordination: How to design BMS cell-balancing?, How to design BMS pre-charge?
FAQ
Q1: What isolation device is used for high-side current sensing, and how to pick the one after the shunt resistor?
The standard chain for high-side shunt sensing is: the shunt resistor converts bus current into a millivolt-level voltage drop, then an isolated amplifier or isolated Σ-Δ modulator sends the analog value across the barrier to the low-side MCU. Selection in five steps: first set the sensing position and full-scale current; second trade off the shunt resistance by P=I²R while matching the device linear-input range grade to the full-scale drop (HOPERF CMT1300 offers ±50mV and ±250mV); third set the transmission form — pick an isolated amplifier for differential analog output straight into the MCU ADC, or an isolated Σ-Δ modulator (CMT130X family) for MCU-side digital filtering and higher precision; fourth check isolation rating and creepage, noting the test value is not the long-term operating voltage; fifth check bandwidth and total delay against the over-current protection loop, and whether the device has fail-safe output and a secondary isolated supply. Parameters follow the selected model original datasheet.
Q2: Is a larger shunt resistor more accurate, and how to trade off power and accuracy?
A larger shunt resistor is not always better. The drop across the shunt is I×R; a larger value gives a larger drop at the same current and better SNR, but power grows by I²R and heating brings temperature drift and resistance shift that actually hurt accuracy, and exceeding the shunt rated power burns it. The trade-off is to think by full-scale drop, not the resistance itself: first see whether the device linear-input range is ±50mV or ±250mV, then back-solve R = full-scale drop / full-scale current. An example of this criterion — for the same 100A full scale: the ±50mV grade needs ~0.5mΩ and ~5W; the ±250mV grade needs ~2.5mΩ and ~25W. So at the same range the higher-range grade needs 5x the resistance and 5x the power, so the larger the bus current the more you should prefer the low-range grade (±50mV), at the cost of a smaller drop that is more demanding on offset, noise and temperature drift. The above is an engineering estimate by V=I×R and P=I²R; actual value also considers the shunt temperature-drift coefficient, cooling and ADC effective bits, following the datasheet and whole-system measurement.
Q3: How to choose an isolated amplifier vs an isolated Σ-Δ modulator, and how to set ±50mV vs ±250mV?
First look at the output form: an isolated amplifier (e.g. HOPERF CMT1300) outputs a differential analog voltage on the secondary, usable as an isolated analog front-end straight into the MCU ADC, with small delay and simple design; an isolated Σ-Δ modulator (CMT130X family) outputs a 1-bit digital bitstream that needs a sinc-class decimation filter on the MCU side to recover, with stronger digital-noise immunity and potentially higher precision, but the decimation filter adds noticeable group delay that must be counted in the time budget for fast over-current protection. The rule: direct into ADC and need a fast protection loop — pick the isolated amplifier; high-precision metering (SOC / SOH estimation) with MCU margin to run digital filtering — pick the isolated Σ-Δ modulator; many designs actually use both on one board, isolated amplifier for protection and Σ-Δ for metering. The range grade follows the shunt full-scale drop: ±50mV fits a small-resistance shunt (large-current bus), ±250mV fits medium-small current with larger resistance and easier SNR. Follow the original datasheet.
Q4: What does fail-safe output mean, and what happens when sensing isolation fails?
Fail-safe output means that when the isolated sensing chain has an internal fault, the output falls to a definite, system-recognizable state instead of giving a seemingly-normal but actually-wrong small current value. This is critical on a BMS and energy-storage PCS: if the isolator secondary supply is under-voltage or the primary input common-mode is over-voltage yet the output still sits near zero, the upper layer misreads the bus as having no current, missing a real fault or misjudging it as disconnected. HOPERF CMT1300 has VDD1 under-voltage detection and input common-mode over-voltage detection, and on trigger gives a fail-safe output so the system can recognize the diagnostic state. Three things must be matched in design: first, connect the diagnostic pin into the MCU and write it into the state machine, do not float it; second, define the post-failure action at the system level (alarm, current limit or relay cut) because BMS fail-safe logic and industrial-control fail-safe logic may point opposite ways; third, the secondary must have an isolated supply meeting creepage and rating, since an unstable supply makes the diagnostic repeat-trigger. Concrete values follow the original datasheet and whole-system failure analysis.
Contact us
For high-side current-sensing isolator selection check (shunt value, range grade and gain matching, delay budget, fail-safe output), HOPERF CMT-series sample application and domestic-replacement evaluation, please contact us.
Shenzhen Intek Technology Co., Ltd — authorized distributor of AMSEMI (Anhui Anmei Semiconductor) TVS and HOPERF (Shenzhen HOPERF Microelectronics) CMT-series digital isolators Tel / WeChat: 136-3264-8484 Address: 4F, Building 2, Jingwei Center, No. 309 Ping'an Avenue, Pinghu Street, Longgang District, Shenzhen Website: www.intek.vip
Disclaimer: This article is technical popular-science and industry exchange content, for reference only, and does not constitute selection, procurement or other business-decision advice. The parameters of input range, fixed gain, SNR, bandwidth, isolation rating and fail-safe diagnostic ability of the isolated sensing device are taken from HOPERF official public materials (website product pages and datasheets) as typical values or range examples; they differ significantly by model and operating condition. The formulas for shunt resistance, power and protection-response delay are engineering-estimation methods; actual design must follow the selected model original datasheet, shunt specification, self-designed circuit calculation and whole-system measurement.