Which Positions in an Energy-Storage System Need Isolation? BMS / PCS Isolation-Position Plan
Bottom line: isolation is not an advanced parameter of some device — it is making the information and energy channels between two circuits at different ground potentials (voltage domains) safe. In energy-storage and BMS systems there are five classes of positions that must be isolated — external communication ports, high-side current sensing, power-device gate drive, board-to-board and pack-to-pack digital signals, and the isolated auxiliary supply — miss any one and at best the low-voltage chips are destroyed by ground drift and surge, at worst you lose fail-safe capability. This article gives a position-by-position checklist and device-selection direction (using HOPERF CMT series as examples); all values are typical or class examples from official materials, per the original manufacturer datasheet.
flowchart TD
A["① Draw the system potential-domain map<br/>high-voltage domain / cell floating ground / low-voltage ground / chassis ground"] --> B["② Check external interfaces<br/>CAN / RS-485 / Ethernet connect externally?"]
B -- "Yes" --> C["Position 1: port isolation<br/>isolated CAN / RS-485 transceiver"]
A --> D["③ Check sensing chain<br/>current/voltage sensing on high side?"]
D -- "Yes" --> E["Position 2: high-side sensing isolation<br/>isolation amplifier / isolated Σ-Δ modulator"]
A --> F["④ Check power stage<br/>control circuit drives power device?"]
F -- "Yes" --> G["Position 3: gate-drive isolation<br/>isolated driver + UVLO class"]
A --> H["⑤ Check board-to-board and pack-to-pack signals<br/>digital signals cross cell-potential difference?"]
H -- "Yes" --> I["Position 4: digital-signal isolation<br/>general digital isolator by channel count"]
C --> J["⑥ Independent isolated supply per domain<br/>flyback / isolated module"]
E --> J
G --> J
I --> J
J --> K["⑦ Budget isolation<br/>dual rating + creepage + barrier clearance"]First, two high-frequency questions
Q: Can I skip isolation, and when will it actually break?
Skipping isolation does not break immediately — it plants a mine. Directly wiring signal lines between two circuits at different ground potentials means the communication-port chips bear a potential difference steady state: the in-pack CAN ground floats with the cell potential, possibly tens or hundreds of volts off the master-board ground; in transients, common-mode surges from lightning, hot-plug and switching noise instantly destroy the interface chips. The typical symptom in practice: the communication-port chips fail mysteriously and repeatedly, a new board dies within days, and the surge test fails on the first hit — and the root cause is always the same un-isolated line.
Q: Optocoupler or digital isolator?
New designs basically no longer use optocouplers: digital isolators are about two orders of magnitude faster, propagation delay down to around 9ns, have no CTR aging with temperature and lifetime, and the isolation barrier is expected to last 40+ years. For legacy retrofit and selection cross-reference see Can an Optocoupler Be Replaced Directly by a Digital Isolator? (Chinese). This article does not expand on device substitution; the focus is position planning — find all the positions that should be isolated first, then talk about which device.
Five classes of mandatory isolation positions
| Position | What to isolate and why | Device direction (HOPERF CMT) | Key parameters |
|---|---|---|---|
| ① External comm port | Touches external cables and different-ground equipment; surge and ground drift hit the interface directly | Isolated CAN: CMT1042 / CMT1052 (CAN FD 5Mbps); isolated RS-485: CMT83085 | Bus fault protection ±70V, 1/8 unit load 256 nodes, bus-pin ESD class |
| ② High-side current sensing | Shunt on the high-voltage bus; sense signal must cross high-to-low ground difference | Isolation amplifier CMT1300 (±50mV / ±250mV), isolated Σ-Δ modulator CMT130X | Fixed gain 8.2 / 41, fail-safe output, SNR and bandwidth per accuracy need |
| ③ Gate drive | Control side and power side different domains; high-side arm needs floating drive | Isolated gate driver CMT8602X (4A source / 6A sink), opto-replacement CMT8603X | UVLO 6V / 9V / 13V classes, CMTI per switching speed, drive to 5MHz |
| ④ Board-to-board / pack-to-pack digital | Slave-board ground floats with cell potential; DC potential difference and common-mode transient vs. master board | General digital isolator CMT812X (2ch) / 804X (4ch) / 826X (6ch) | DC~150Mbps, typical 9ns propagation delay, CMTI ±200 ~ ±250kV/μs |
| ⑤ Isolated auxiliary supply | Secondary chips need independent power; sharing ground with primary shorts the isolation | On-board isolated flyback or isolated supply module | Multi-output secondary per voltage domain, see auxiliary-supply article |
Position 1: external communication port (CAN / RS-485)
This is the easiest to understand and the most often skipped. In-pack CAN, inter-pack cascade CAN and external RS-485 all connect to equipment whose ground potential you do not control — inverters, EMS hosts, chargers, meter-reading buses. One side of the interface chip is ground you control, the other side is ground someone else controls, and all the potential difference and surge between them are borne by the interface chip.
The standard configuration is front-stage TVS + isolated transceiver: the TVS handles transient surge, the isolator blocks steady-state common mode. See How to Select Isolated CAN and RS-485 Transceivers for selection points (extra CAN FD requirements on the isolator, 1/8 unit-load node count, TVS even with an isolator fitted).
Position 2: high-side current sensing
The BMS needs bus current, so the sense resistor must be in series with the high-voltage bus. The shunt has only tens of millivolts of differential signal, but it "rides" on hundreds of volts of common-mode potential — this signal cannot go straight into the MCU ADC; it must cross isolation first.
Typical chain: shunt → isolation amplifier (CMT1300, linear input ±50mV / ±250mV, fixed gain 8.2 or 41) or isolated Σ-Δ modulator (CMT130X) → low-voltage-side filtering and calibration. CMT1300 has a fail-safe output on VDD1 under-voltage and input common-mode over-voltage detection: when the primary side is abnormal the output enters a determined state, so the MCU side can recognize "sensing failed" rather than misread a fake current value — a hard requirement for BMS fail-safe design.
The shunt value trades off between power dissipation and accuracy: smaller resistance means lower loss and temperature rise, but smaller signal amplitude and higher demand on accuracy and noise. Sensing is continuously working functional isolation and must be accounted separately from the communication port (see isolation budget below).
Position 3: power-device gate drive
The control circuit (MCU / analog front end) is in the low-voltage domain; the power-device source is in the power domain — the half-bridge high-side source also swings at the switching node frequency and must be floating-driven. The isolated gate driver solves both "cross potential domain" and "floating drive" at once.
Three selection handles: drive capability (CMT8602X is 4A peak source / 6A peak sink, setting the switching edge and switching loss); UVLO class (6V / 9V / 13V three classes — 9V for low-voltage MOS platforms, 13V for the 15~18V platforms common to IGBT and SiC; too low and normal drive voltage mis-locks); CMTI (for SiC high dv/dt, take 2~3x the system-measured dv/dt). Gate-loop tuning itself (gate resistor, Miller plateau, dead time) is in How to Design a MOSFET Gate-Drive Circuit; high-side supply trade-offs in How to Power a Half-Bridge High-Side Drive (Chinese).
Position 4: board-to-board and pack-to-pack digital signals
The slave board (BMU) sits on the cells, its ground follows the potential of its string; the master-board ground connects to system low-voltage ground. Pulling SPI, UART and IO status lines between them makes the digital chips bear a varying DC potential difference long term. This is a high-frequency position for "no problem at design, mass failure in production".
Select a general digital isolator by signal direction and channel count: one status return line picks CMT812X (2 channels), SPI four-wire picks CMT804X (4 channels), multi-line parallel control and status picks CMT826X (6 channels, CMTI ±250kV/μs). Align the default-output suffix (1 = default high, 0 = default low) with the fail-safe logic — whether you want the far side to read a stop signal or hold signal when the primary loses power; reversed and the fail-safe behavior is completely inverted.
Position 5: isolated auxiliary supply
Every secondary-side chip in every isolation domain needs power, and this supply itself must not share ground with the primary — otherwise the isolation is shorted by the supply wire and all the isolation above is wasted. The on-board approach is mainly isolated flyback; with multiple isolation domains plan multiple secondary outputs by voltage domain. Isolated-flyback topology, RCD clamp and failure debugging are in How to Design an On-Board Auxiliary Supply (Chinese).
How to budget isolation
Once the positions are found, roll the whole system isolation need into one budget table and check three things per item:
| Check item | Rating meaning | Common error |
|---|---|---|
| Dual isolation rating | 5kVrms is the UL1577 test value (about 1 min applied without breakdown), not the long-term operating voltage; the operating isolation voltage (e.g. about 1060Vrms for CMT1042) is the basis for checking the system potential difference | Treating 5kVrms as operating voltage and telling a 1kV bus "enough margin" |
| Creepage and clearance | Check package creepage per system safety standard and pollution degree; narrow-body (3.75kVrms) and wide-body (5kVrms) packages differ | Only looking at the rating number, not the package size; PCB done before finding creepage insufficient |
| CMTI and rate | Check per position by dv/dt and communication rate, not one number for the whole system | Low-speed device on a high-voltage bridge arm, CMTI margin insufficient, occasional false flip |
Key point: account functional isolation and safety isolation separately. Sensing and drive are continuously working functional isolation, accounted by operating voltage and lifetime; communication ports and external interfaces by safety grade and surge grade. Different ratings — do not summarize the whole system with one "5kVrms".
Division of labor between isolation and TVS
Isolation and TVS guard against two different threats and cannot replace each other:
- Isolation devices handle common mode and steady state: ground-potential difference, common-mode transients, safe information transfer between different voltage domains. The isolator itself has limited surge-energy absorption.
- TVS / MOV / GDT handle transient energy: lightning induction and switching-generated surge current must be absorbed by clamping and diverting devices.
So the correct configuration on an external port is "front-stage TVS + isolated transceiver", not either/or. If all isolation positions are covered yet the surge test still fails, first check the front-stage clamp and grounding path, then the layout under the isolation barrier — staged isolation and surge design are in How to Select Isolated CAN and RS-485 Transceivers and Surge Protection for Energy Storage / BMS respectively.
Common pitfalls
| Pit | Symptom | Correct approach |
|---|---|---|
| Missing board-to-board signal isolation | Mass failure of communication-port chips in production, not exposed at prototype | Check the potential-domain map line by line; isolate all cross-domain signals |
| Secondary supply shares ground with primary | Isolator fitted but surge still punches through low-voltage side | Independent isolated supply per domain; a supply pin across the barrier is a short |
| Default output reversed | Load that should stop keeps conducting on failure | Pick suffix 1 / 0 by fail-safe logic, confirm before power-on |
| Copper/traces under the barrier | Insufficient safety distance, immunity and rating both degrade | Clearance under barrier, decoupling placed close on both sides |
| Only checking the 5kVrms number | Long-term operating voltage and creepage both unchecked | Check each by the dual rating, narrow/wide body separately |
Related solutions
- Full isolator selection: How to Select a Digital Isolator (Chinese)
- Isolated CAN / RS-485 transceiver selection: How to Select Isolated CAN and RS-485 Transceivers
- Optocoupler to digital isolator migration: Can an Optocoupler Be Replaced Directly by a Digital Isolator? (Chinese)
- Isolator secondary-side supply design: How to Design an On-Board Auxiliary Supply (Chinese)
- High-side sensing and whole-BMS protection: How to Select a TVS for BMS Protection Boards, Surge Protection for Energy Storage / BMS
- Gate-drive tuning: How to Design a MOSFET Gate-Drive Circuit
FAQ
Q1: Which positions in an energy-storage / BMS system must be isolated, and what happens if one is missed?
There are five classes of positions that must be isolated in energy-storage and BMS systems. One, external communication ports: in-pack CAN, inter-pack cascade and external RS-485 directly touch external cables and equipment at different ground potentials, using isolated CAN transceivers (e.g. HOPERF CMT1042 / CMT1052) or isolated RS-485 transceivers (e.g. CMT83085). Two, high-side current sensing: the shunt sense signal must cross the high-to-low voltage ground-potential difference to the MCU, using an isolation amplifier or isolated sigma-delta modulator (e.g. CMT1300). Three, power-device gate drive: the control side and power side are different potential domains, and the high-side bridge arm needs floating drive, using an isolated gate driver (e.g. CMT8602X, UVLO in 6V / 9V / 13V classes). Four, board-to-board and pack-to-pack digital signals: the slave board and master board cross cell-potential differences, using general digital isolators (e.g. CMT812X / 804X / 826X by channel count). Five, the isolated auxiliary supply: the secondary-side chips need independent power and must not share ground with the primary. Miss any class and at best surge or ground drift slowly destroys the low-voltage chips, at worst you lose fail-safe capability. Follow the system safety standard and the part datasheet.
Q2: Does the BMS slave board need isolation from the master board, and what isolator is used?
Yes. The slave board (BMU) sits on the cells, its ground follows the potential of its string; the master board ground connects to system low-voltage ground or chassis ground, and a DC potential difference that varies with state of charge and cell count exists between them, plus common-mode transients. Without isolation, the communication-port chips bear the potential difference long term and degrade slowly, and are more easily destroyed instantly by surge and hot-plug. Use a general digital isolator for the board-to-board digital signals, selected by signal direction and channel count: one status return line picks 2 channels (e.g. HOPERF CMT812X, DC to 150Mbps, typical 9ns propagation delay, CMTI ±200kV/μs), SPI-class multi-line picks 4 channels (CMT804X), multi-line parallel control and status picks 6 channels (CMT826X, CMTI ±250kV/μs). When selecting, align the default-output suffix (suffix 1 = default high, suffix 0 = default low) with the fail-safe logic, and fit an isolated supply on the secondary side. Follow the system potential difference, communication rate and the part datasheet.
Q3: How is high-side BMS current sensing done, and how does the shunt sense signal reach the low-voltage MCU?
The typical high-side current-sensing chain: a milliohm-class shunt is inserted in the high-voltage bus, the voltage drop across the shunt (commonly ±50mV or ±250mV range) goes into an isolation amplifier or isolated sigma-delta modulator, crosses the barrier to the low-voltage side, then is filtered and calibrated. Taking HOPERF CMT1300 as an example: linear input ±50mV / ±250mV two ranges, fixed gain 8.2 or 41, with a fail-safe output on VDD1 under-voltage and input common-mode over-voltage detection — when the primary side is abnormal the output enters a determined state, letting the MCU side judge the failure. The shunt value trades off between power dissipation and accuracy: smaller resistance means lower loss and temperature rise, but smaller signal amplitude and higher demand on small-signal accuracy and noise. Current sensing is continuously working functional isolation and must be accounted separately from the communication port and gate-drive isolation ratings, not lumped under one number. Follow the measured shunt drop, accuracy need and the part datasheet.
Q4: All isolation positions are covered, so why does the surge test still fail? What is the division of labor between isolation and TVS?
Isolation and TVS guard against two different threats and cannot replace each other. Isolation devices handle steady-state ground-potential difference and common-mode transients: they make the signal and supply channels between two voltage domains safe, preventing the low-voltage side from being slowly destroyed by sustained potential difference, and they carry a CMTI rating requirement against common-mode transients. TVS handles transient surge energy: lightning induction and switching-generated surge current must be absorbed by clamping and diverting devices such as TVS, MOV and GDT; the isolator itself has limited surge-energy absorption. So the standard configuration on an external port is front-stage TVS plus an isolated transceiver: the TVS clamps the surge to what the transceiver can withstand, and the isolator blocks the residual common mode and ground-potential difference outside the low-voltage side. When the surge test fails, first check the front-stage clamp and grounding path, then the isolator CMTI and layout (clearance under the barrier); investigate the two directions separately. See the site surge-protection article for staged design. Follow IEC 61000-4-5 grade and measurement.
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Disclaimer: This article is technical education and industry exchange for reference only and is not selection, procurement or other commercial decision advice. The rate, propagation delay, CMTI, drive current, UVLO class, isolation rating and gain parameters are taken from HOPERF official public materials (product pages and datasheets) as typical values or class examples; they vary significantly by model, package and operating condition. Actual design must follow the selected part original datasheet, system safety standard and on-board measurement.