What Is MOSFET Avalanche Breakdown? How to Select an Avalanche-Rugged Power MOSFET
Bottom line: avalanche breakdown is not a failure, it is a permitted energy dissipation mechanism. At the instant the device is clamped at its breakdown voltage, the energy stored in the inductance has to be absorbed by the device itself with the channel turned off. So avalanche-rugged design is a chain of four steps: one, calculate the system stray inductance accurately; two, compute the real single-event energy with E = one half L I squared and apply temperature derating; three, check EAS, EAR and SOA instead of the nominal current rating; four, bring the spike down in the circuit first. The field complaint "I already moved to a higher-current part and it still blows" usually means only the current grade changed while the energy budget was never calculated.
flowchart TD
A["1. Locate the energy source<br/>turn-off loop stray L + peak current"] --> B["2. Single-event energy<br/>E = 1/2 x L x I squared"]
B --> C{"3. Compare with EAS / EAR<br/>derate by starting junction temp, keep margin"}
C -- "insufficient" --> D["4a. Cut stress in the circuit<br/>clamp / snubber / shorter loop / lower di/dt"]
C -- "sufficient" --> E["4b. Select the device<br/>EAS grade / SOA shape / thermal resistance"]
D --> F["5. Verify by UIS measurement<br/>clamp voltage + duration + junction temp"]
E --> F
F -- "margin short" --> D
F -- "pass" --> G["6. Confirm lot consistency and ageing"]First, the two questions asked most often
Question: the MOSFET blew — was it avalanche or overvoltage? These two are often confused, but the fixes go in different directions. Exceeding the VDS rating is overvoltage breakdown: the junction is punctured under a very high field and the result is essentially destructive. Being clamped at the breakdown voltage while the device absorbs the inductive energy is avalanche: as long as energy and junction temperature stay inside the rating the device recovers intact, which is exactly why datasheets specify an avalanche energy. The only reliable way to tell them apart is the measured drain-source waveform: does a clamped voltage plateau appear, how high is it, and how long does it last.
Question: why does it still blow after I moved to a higher-current part? Because current rating and avalanche ruggedness are two different dimensions. A larger nominal current usually only means better on-resistance and package heatsinking, not a larger EAS. If the failure is caused by inductive energy, selecting by current grade treats nothing — what must be checked is the single-pulse avalanche energy EAS of the device at the relevant junction temperature and current, and in bridge topologies the shape of the safe operating area (SOA) matters even more.
Step 1: locate where the energy comes from
Avalanche stress always originates in an inductance. The only question is which one:
| Energy source | Typical location | Field symptom | Waveform signature |
|---|---|---|---|
| Transformer leakage inductance | Flyback or forward primary, auxiliary supply | Primary switch blows at start-up or full-load transient | High plateau after the turn-off edge, tens to hundreds of nanoseconds wide |
| Trace and harness inductance | BMS power path, pack wiring, busbar | Arcing, blowing at the instant of a short circuit | Plateau width grows with harness length, often microseconds |
| Motor phase inductance | Motor drive bridge, BLDC controller | Blows on stall, emergency stop or commutation error | Clamped at turn-off, energy proportional to phase current squared |
| Load-side long cable inductance | Output cables, relay circuits | Blows on output short or relay opening | Clamp plateau strongly correlated with cable length |
Key point: measure the inductance before discussing the device. The total stray inductance of the turn-off loop can be back-calculated from the clamp duration on the turn-off waveform, estimated from loop geometry, or — most reliably — measured with a double-pulse test. All of the above are engineering estimates; the real value follows the measured waveform and loop parameters.
Step 2: work out the single-event avalanche energy
The basic formula is simple:
E = 1/2 x L x I squared
- L: total stray inductance of the turn-off loop, including transformer leakage inductance, harness inductance and trace loop inductance, in henries.
- I: the peak current at the instant of turn-off, not the average current.
Two corrections that are easy to miss:
- Take the peak current from the worst-case condition. During transients such as short-circuit protection acting, stall or a failed soft start, the current is often several times the steady-state value. Energy calculated from steady-state current is seriously low.
- Derate by starting junction temperature after calculating energy. Datasheets normally state EAS at both 25 and 150 degrees Celsius starting junction temperature, and capability is markedly lower when hot. Temperature rise left by one avalanche event eats directly into the margin for the next — repetitive events such as short-circuit protection retriggering must be checked against the repetitive avalanche energy EAR, not the single-pulse EAS.
| Scenario | Energy order of magnitude | Main uncertainty |
|---|---|---|
| Flyback primary turn-off | Leakage energy about one half Lk Ipk squared; often millijoules in low-power flybacks | Measured leakage inductance, operating mode (CCM or DCM) |
| BMS power path turn-off | Strongly tied to harness inductance; can be large at the instant of a short | Harness length and loop area, short-circuit current |
| Motor emergency stop / commutation | Proportional to phase inductance and phase current squared | Phase inductance, commutation timing, whether a freewheel path exists |
| Relay or contactor opening | Depends on load inductance and breaking current | Contact arcing, whether precharge and freewheel paths exist |
This table gives orders of magnitude only. Never draw a conclusion from a bare figure such as a few millijoules — the real value must be checked together with measured loop inductance, actual peak current and the EAS curve of the device, and parameters follow the manufacturer datasheet.
Step 3: how to read the three avalanche parameters in a datasheet
| Parameter | Meaning | What to watch when reading it |
|---|---|---|
| EAS | Single-pulse avalanche energy | Stated for one inductance, one current and one starting junction temperature; figures from different test conditions are not comparable |
| EAR | Repetitive avalanche energy | Involves a power and junction temperature balance; check it when short-circuit protection retriggers or a flyback clamps every cycle |
| IAS / IDS,ar | Allowable avalanche current | Same origin as EAS; reflects the peak current the device can take, not a continuous current |
| SOA | Safe operating area (usually a linear-region curve) | Applies to linear-region operation and cannot be extrapolated to a switching plus avalanche scenario |
Two hard reminders:
- SOA is not avalanche ruggedness. SOA curves are measured with the device in the amplifying region under DC or pulsed conditions, where the channel carries the voltage drop. Avalanche happens after the channel turns off, with the body diode region carrying voltage and current — a completely different mechanism. Check SOA for linear-region use (linear regulation, electronic loads, hot-swap current limiting) and check EAS and EAR for switching applications.
- Do not look only at nominal voltage and current. Two devices both rated 100 V and 100 A can differ by an order of magnitude in avalanche energy, because it is set by chip design and cell structure. Check EAS part by part in the datasheet.
Step 4: four gates for avalanche-rugged selection
| Dimension | What to judge | Common mistake |
|---|---|---|
| Avalanche energy grade | Check EAS and EAR against the real energy from step 2 times a safety factor | Looking only at nominal current and ignoring EAS and EAR |
| Breakdown voltage behaviour | Drift direction and magnitude of breakdown voltage with junction temperature determine clamp stability | Estimating the high-temperature clamp level from the 25 degree Celsius VBR |
| Package and thermal resistance | Package sets R theta JC and heat capacity; avalanche is a short high-power event where heat capacity matters more than steady-state thermal resistance | Comparing steady-state R theta JC only and ignoring the transient thermal impedance curve |
| Device family and generation | Cell design sets avalanche tolerance, so check part by part | Assuming the same package and current grade means the same ruggedness |
Recommended order: cut the stress with circuit measures first, then select the device for the remaining stress. Doing it the other way round — picking the most expensive device first and then working out how to survive — is usually both expensive and unreliable.
Step 5: cut the stress in the circuit (the best value step)
| Measure | Mechanism | Cost and cautions |
|---|---|---|
| RCD or active clamp | Moves leakage energy from the switch into the clamp network | More parts and more loss; too low a clamp voltage raises loss noticeably |
| RC snubber | Suppresses turn-off overshoot and ringing, lowering peak voltage | Values must be tuned against measured waveforms; bad values add loss |
| Shorten the power loop | Reduces trace loop area and harness length, directly lowering L | Must be done at layout stage; board respins later are expensive |
| Reduce di/dt | Increase gate turn-off resistance, or adjust drive strength | Slower turn-off raises switching loss; trade off against temperature rise |
| Speed up protection | Faster short-circuit response lowers peak current | Too low a threshold causes false triggering; coordinate with noise margin |
| Negative turn-off bias / Miller clamp | Suppresses dv/dt induced false turn-on and shoot-through | Needs a driver capable of negative bias or clamping |
Recommended order: shorten the loop (layout) first, then add clamping and snubbers, and tune di/dt and protection speed last. Turn-off loop and gate resistor tuning is covered in How to Design a MOSFET Gate Drive Circuit; clamp device selection is covered in How to Select a Rectifier Diode (Chinese) and How to Select a Low-Clamping TVS for a BMS Protection Board (Chinese).
Step 6: verify the budget with a UIS measurement
Unclamped inductive switching (UIS) testing is the standard way to bring the energy budget from paper back to measurement:
- What to measure: charge the inductor to a set current, turn the device off, and record VDS, IDS and duration. The height times the width of the clamp plateau is the real stress the device dissipates.
- How to judge: convert the measured stress into energy and compare with EAS at that junction temperature; also record case temperature rise to confirm there is no cumulative heating.
- What to watch: UIS only validates the one inductance and current you set and cannot be extrapolated to other conditions; production parts spread, so sampling must cover multiple lots; let the device return to the starting temperature condition before repeated tests.
Failure waveform and symptom cross-reference
| Field symptom | Likely mechanism | First thing to check |
|---|---|---|
| High plateau on the turn-off edge, then short circuit | Avalanche energy above EAS, junction temperature overshoot | Calculate inductive energy, add clamping, move to a higher EAS grade |
| VDS shoots past the rating and then breaks down | Overvoltage breakdown (loop inductance too large or clamp not working) | Shorten the loop, confirm the clamp actually operates |
| Both high-side and low-side blow together | Shoot-through from Miller false turn-on or insufficient dead time | Check the drive loop, dead time and negative turn-off bias |
| Primary switch blows at start-up | Start-up transient leakage spike stacked on top | Check the start-up waveform, RCD clamp and start-up resistor |
| Batch failures after arcing or a short circuit | Harness inductance energy plus short-circuit current | Check harness layout, protection response time and device energy grade |
Symptoms are clues only; the final judgement must return to measured waveforms and datasheet parameters. Products subject to safety and certification should be validated together with surge and short-circuit testing — see How to Design Surge Protection for Storage and BMS Products.
Related reading
- Turn-off overshoot, ringing and gate loop tuning: How to Design a MOSFET Gate Drive Circuit
- Primary MOSFET rating and clamping in an on-board auxiliary supply: How to Design an On-Board Auxiliary Power Supply (Chinese)
- Loss breakdown, thermal resistance chain and junction temperature derating: IGBT and MOSFET Running Hot: What to Do (Chinese)
- MOSFET selection and paralleling for the BMS power path: How to Select Charge and Discharge MOSFETs for a BMS Protection Board
- Flyback secondary rectifier rating and ringing: How to Select a Rectifier Diode (Chinese)
- Graded surge protection at the product ports: How to Design Surge Protection for Storage and BMS Products
FAQ
Q1: What is the difference between MOSFET avalanche breakdown and overvoltage breakdown, and how do I tell which happened?
Overvoltage breakdown happens when the drain-source voltage exceeds the rated value and the structure is punctured; it is essentially destructive, the device normally shorts on the spot, and the package may be cracked or burnt. Avalanche breakdown happens when the voltage is clamped at the breakdown voltage and the inductive energy is dissipated through the body diode region with the channel off; as long as energy and junction temperature stay inside the rating, the device recovers intact. The way to tell them apart is the measured waveform: whether a clamped voltage plateau appears. Cross-check with whether VDS is shorted and VGS is punctured after failure. The two mechanisms call for different fixes, and figures and criteria follow the manufacturer datasheet and measurement on the complete product.
Q2: How do I judge whether the datasheet EAS is enough?
Calculate the real system energy first: E = one half L I squared, with L as the total stray inductance of the turn-off loop (transformer leakage, harness and trace inductance) and I as the peak current under the worst-case condition, then compare against EAS at the corresponding starting junction temperature with safety margin. Three points that must be respected: EAS is normally stated at both 25 and 150 degrees Celsius starting junction temperature and capability falls markedly when hot, while leftover heat from one avalanche eats into the next, so repetitive events must be checked against EAR; EAS is measured under manufacturer test conditions, so figures from different conditions are not comparable; and a UIS measurement only validates the operating point you set, not every condition. Final answers follow the manufacturer datasheet and measurement on the complete product.
Q3: How should I choose an avalanche-rugged device for a flyback versus a BMS power path?
The energy sources differ, so the priorities differ. The flyback primary sees transformer leakage energy: small per event (often millijoules in low-power designs) but repetitive, so the emphasis is the clamp network (RCD, Zener or LCD) working with EAS and EAR of the primary switch, and the primary rating must cover maximum input voltage plus reflected voltage plus spike margin — see How to Design an On-Board Auxiliary Power Supply (Chinese). The BMS power path sees harness inductance and short-circuit current: large energy in single events, so the emphasis is shortening the loop, protection response speed and current sharing between paralleled devices — see How to Select Charge and Discharge MOSFETs for a BMS Protection Board. Both routes should be based on measured loop inductance and waveforms, with parameters from the manufacturer datasheet.
Q4: Can paralleling several MOSFETs share the avalanche energy?
Only if the avalanche voltages and trigger instants closely match and the layout is symmetrical. In practice breakdown voltage spreads between paralleled parts, so whichever device reaches breakdown first absorbs the whole energy and can become the single failure point. Sharing avalanche stress therefore requires a symmetrical layout, an individual gate resistor per device to limit current and voltage sharing error, and an EAS check against the worst-case distribution of shared energy. The more robust approach is still to cut the stress in the circuit first and treat paralleling as a last resort. Final design and sharing compensation follow measured waveforms and the manufacturer datasheet.
Contact us
For EAS and EAR checks on CR Micro MOSFET, IGBT and SiC devices, advice on UIS test setups, or replacement evaluation and sample testing for flyback and BMS power paths, contact us. Send us the loop parameters, the measured turn-off waveform and a description of the failure, and we will work through the energy budget step by step.
Shenzhen Intek Technology Co., Ltd — electronic component distributor and system solution provider Phone / WeChat: 136-3264-8484 Address: 4F, Building 2, Jingwei Center, No. 309 Ping an Avenue, Pinghu Street, Longgang District, Shenzhen Website: www.intek.vip
Disclaimer: This article is technical education and industry exchange for reference only and is not selection, procurement or other commercial decision advice. Stray inductance, avalanche energy, junction temperature derating and clamp or snubber parameters quoted here are typical industry ranges or order-of-magnitude estimates; real values vary significantly with topology, loop layout, device generation and operating condition. Final design must follow the ratings and test conditions in the manufacturer datasheet, your own circuit calculation, and measurement on the complete product.