Surge Protection on the BMS Main Circuit: Clamping Contactor Coil Flyback, Bus Transients, Precharge and Gate Supply
One sentence conclusion: a BMS main circuit is not a bus with one TVS across it, it is five transients with different mechanisms sharing one board - the L di/dt left across the charge and discharge MOSFETs, relay and contactor coil turn-off flyback, precharge inrush at kiloampere scale, negative excursions and noise pushed onto the gate and auxiliary supply, and contact bounce injecting repeated surges. The design order is always locate the path first, then select the device - get the path wrong and no amount of surge rating will help. Three sentences decide whether the board survives: coil flyback is dissipated at the coil itself, bus residual must be measured at the MOSFET drain and source, and closing the main relay with no precharge means charging the bus capacitance through milliohms.
1. Split the main circuit into five transients: locate by position, not by part
In most field failures on a main circuit the first reaction is that the TVS rating is too low, and the part is swapped from 5 kW to 8 kW. But at least five transient classes exist on a main circuit, and they differ in energy source, timescale and conduction path. Getting the clamping position wrong for just one of them can collapse the whole protection chain.
| Transient class | Energy source | Typical shape | First choice of clamp location |
|---|---|---|---|
| Bus L di/dt | Busbar or harness inductance times current step | Microsecond spike, recurring | Across the bus, close to the MOSFET and busbar |
| Coil turn-off flyback | Relay or contactor coil energy 1/2 L I squared | Single triangular pulse, amplitude several times the supply | At the coil terminals |
| Precharge inrush energy | Bus capacitance 1/2 C U squared charged through milliohms | Millisecond high current pulse | Current limiting plus timeout in the precharge branch |
| Gate supply negative excursion | Turn-off dv/dt coupled through Cgs and Cgd, plus ground bounce | Short negative dip and overshoot | Gate loop and gate supply decoupling |
| Contact bounce surge | Contact chatter repeatedly making and breaking an inductive loop | Burst of small high frequency pulses | RC or MOV across the contacts, plus coil clamping |
That table is the whole skeleton. Each section below answers only three questions: which parameter is being clamped, where the device goes, and what it is sized on.
Convention note: main circuit transient levels depend heavily on harness length, busbar layout, relay type and capacitance. Every figure here is an engineering order of magnitude or an algorithm, not a substitute for the original datasheet and system level testing.
2. Contactor and relay coil flyback: the device most often placed in the wrong spot
2.1 Why it is so often misplaced
The contacts of a relay or contactor sit in the main circuit, but its coil is usually driven from a separate driver board or from a BMS IO. Seeing the drive MOSFET destroyed, engineers place a TVS across that MOSFET drain and source. That puts the clamp downstream of the current path.
The coil energy lives in the coil, and at turn-off it must find a loop. The shortest and most effective loop is right at the coil terminals. The further the clamp sits, the larger the trace inductance and the sooner the spike lands somewhere else.
flowchart TD
A["Relay or contactor turn-off command"] --> B{"Is there a clamp<br/>across the coil itself"}
B -- "No" --> C["Coil energy 1/2 L I squared<br/>finds no low impedance loop"]
C --> D["Coil terminal voltage pushed<br/>to several times the supply"]
D --> E["Drive MOSFET or driver IC<br/>breaks down or back feeds the control side"]
B -- "Yes" --> F{"Which clamping method"}
F --> G["Flyback diode<br/>lowest voltage, slowest release"]
F --> H["Diode plus Zener or TVS<br/>clamp level can be set"]
F --> I["RC snubber<br/>also quenches contact arcing"]
F --> J["Foldback TVS<br/>lowest clamp, faster release"]
G --> K["Check drive device rating<br/>and release time"]
H --> K
I --> K
J --> K2.2 Four methods: decide how fast release must be, then how high the clamp can sit
Coil clamping is not a case of lower is better. The lower the clamp, the slower the coil current decays, and the slower the relay releases. So the first question is mechanical and safety related: how fast must this contactor open?
| Clamping method | Clamp level | Release speed | Where it fits |
|---|---|---|---|
| Flyback diode only | About 0.7 V plus the supply | Slowest | Fast opening not required, drive device rating tight |
| Diode plus Zener in series | Settable, supply plus Vz | Medium | The usual compromise, most common |
| RC snubber | Set by the time constant | Medium to fast | Contact arcing must also be quenched |
| Foldback TVS | Lowest of the four at the same grade | Fairly fast | Fast opening required and drive rating margin is thin |
This is where a foldback TVS first earns its place: for the same release time it holds the coil terminal voltage at a lower level, so the drive MOSFET rating does not have to move up a grade. Note however that coil flyback is a single, low energy event (millijoules). A high power tier is almost never needed here; a small package with adequate energy rating is enough, and the power headroom should be spent on the bus.
2.3 Two hard constraints that get skipped
- The clamp voltage must stay within the drive device rating, with margin. Coil clamp level is repetitive stress on the drive MOSFET drain and source, applied at every turn-off. It cannot be judged as a transient that passes and is gone.
- The contacts need protection too, not just the coil. Breaking an inductive loop arcs at the contacts as well, which over time shows up as oxidation and rising contact resistance. Where long life matters, add an RC or MOV at the contacts. One coil clamp device cannot fix both ends.
3. Bus L di/dt: why measuring across the TVS gives a false pass
3.1 Residual is set by the TVS plus the trace, not by the TVS alone
The datasheet clamping voltage is a reading at a calibrated point. What actually appears at the downstream MOSFET drain and source is:
V_DS(peak) is approximately Vc(TVS) plus L_trace times di/dtMain circuit di/dt is very steep when current steps (MOSFET turn-off, relay switching, short circuit recovery), and busbar, harness and pad inductance commonly runs from tens to hundreds of nanohenries. Even at 50 nH and 100 A per microsecond that term is 5 V, and real main circuits switch faster still.
Conclusion: a clean waveform at the TVS terminals does not mean the MOSFET survived. Move the probe to the pins of the protected device.
3.2 Which parameter the bus is clamped on
The first constraint on the bus is whether the downstream device gets punched through, so what matters is the downstream withstand window, not the nominal surge rating:
| Item to work out | How to take it | Pass criterion |
|---|---|---|
| Downstream MOSFET or IC rating | Nominal minimum, or measured typical about 10 percent higher | Take the more conservative of the two |
| Allowed residual ceiling | Rating times 0.85, 0.8 for automotive | Engineering practice, not a mandatory standard |
| Actual TVS residual | Vc at the target surge current | Not the single calibrated Ipp point |
| Trace contribution | L_trace times di/dt | Set by layout, must be measured |
The full derivation of that chain is in the voltage window for 23S and 24S buses. This article stresses one point: raising the power tier does not change Vc.
3.3 A higher power tier does not lower the clamp
Across the 3000 W / 5000 W / 8000 W tiers of the AMSEMI -N foldback series, VBR range and maximum Vc at the same voltage grade are identical. What changes is surge current capability Ipp:
| Power tier | 54 V grade part | VBR min to max (V) | Vc max (V) | Ipp (A) |
|---|---|---|---|---|
| 3000 W | SMDJ54CA-N | 60.0 to 66.3 | 69.6 | 34.4 |
| 5000 W | 5.0SMDJ54CA-N | 60.0 to 66.3 | 69.6 | 57.5 |
| 8000 W | 8.0SMDJ54CA-N | 60.0 to 66.3 | 69.6 | 91.8 |
(Datasheet convention: AMSEMI Doc. 8060084 / 8060055 / 8060057, all 10/1000 us. The 8000 W tier figures follow the manufacturer published data; confirm against the latest datasheet.)
So if the field problem is residual high enough to punch the MOSFET, moving to a higher power tier does nothing at all to the residual. There are only two levers: move to a lower clamping part (the foldback version is about 20 percent lower than the standard part at the same grade), or raise the protected device rating by one grade. The first saves cost, the second adds it. Full model cross reference is in the AMSEMI foldback TVS model and cross reference page.
Convention rule when quoting: AMSEMI 5.0SMDJ datasheets (8060014 standard, 8060055 -N foldback) carry only the 10/1000 us convention and contain no 8/20 us data at all. Some imported brands publish both (for example the Littelfuse 5.0SMDJ85CA public table lists 36.5 A at 10x1000 us and 273.8 A at 8x20 us). That figure is Littelfuse own convention and must be attributed, and the two waveforms must never be converted into one another or subtracted.
4. The precharge branch: the most skipped and most dangerous section
There is one invisible high current device on the main circuit: the bus capacitance. Closing the main relay, or the main MOSFET, with the pack connected straight across milliohm class loop impedance produces an inrush that in theory equals pack voltage divided by total loop impedance. On a 48 V platform with a few tens of milliohms that reaches the kiloampere region.
Three typical outcomes: the main relay contact welds and cannot open again, the main MOSFET exceeds its single pulse avalanche or surge rating, and the bus collapses far enough to trip undervoltage or reset the controller.
| Do this | Why | Common mistake |
|---|---|---|
| Keep the precharge branch separate (precharge relay plus limiting resistor) | Limits inrush to the few ampere region | Sharing the main relay, which does neither job well |
| Close the main path only at 90 to 95 percent of pack voltage | Leaves only 5 to 10 percent differential, so no inrush burden | Threshold set too low, so inrush remains |
| Fit precharge timeout protection | With a welded relay the resistor sees P = V squared / R continuously, about 153 W at 48 V and 15 ohm | No timeout, resistor burns through or catches fire |
Resistor selection, the dual check of pulse energy 1/2 C U squared against steady state V squared / R, and the three way precharge failure diagnosis are covered in how to design a BMS precharge circuit. Two points that get missed:
- The precharge branch needs its own clamping protection. The resistor carries usable power during inrush and the precharge relay, or precharge MOSFET, still stands off the full bus voltage at the instant of closing. With a MOSFET the single pulse SOA must be checked; steady state current is not a valid basis.
- Precharge failure is often misdiagnosed as a failed TVS. A welded contact producing sustained overcurrent overheats the bus TVS, so the symptom is a failed TVS while the root cause is in the sequence. See section 7 for the order of diagnosis.
5. Gate supply and gate loop: negative dips, ground bounce, and failures where the part is fine
Not all main circuit MOSFET failures are energy problems. Three transient classes are unrelated to energy and just as destructive:
| Symptom | Mechanism | Countermeasure |
|---|---|---|
| Gate-source overvoltage or negative breakdown | Turn-off dv/dt coupled through Cgd lifting the gate, or ground bounce pushing Vgs negative | Separate on and off gate resistors, Miller clamp, gate-source clamp or ESD part close to the device |
| Driver malfunction or shoot through | False turn-on during the Miller plateau, insufficient dead time or drive strength | Check Qg against peak drive current, check Cgd times dv/dt against threshold |
| Gate supply sagging or resetting | Peak drive current back feeding the supply, inadequate decoupling | Local decoupling at the gate supply, separate return for the drive loop |
The full derivation is in how to design a MOSFET gate drive circuit and why a BMS burns its MOSFETs, which attributes failure layer by layer; this article's classification is by position and complements it. One criterion is worth repeating:
A narrow, tall spike far above the rating means an energy path problem: look at clamping.A plateau lasting tens to hundreds of nanoseconds means a gate or drive problem: look at the gate loop.Rising case temperature before anything else means a thermal problem: look at current sharing and heatsinking.
6. The six step main circuit protection workflow
flowchart LR
A["1 Split transients<br/>list five paths by position"] --> B["2 Draw boundaries<br/>AC entry, DC bus, load side"]
B --> C["3 Capture waveforms<br/>measure before selecting"]
C --> D["4 Work back the window<br/>rating times 0.85 sets residual"]
D --> E["5 Place devices<br/>coil local, bus at MOSFET, precharge limiting"]
E --> F["6 Bench verification<br/>probe the protected device pins"]
F --> G["7 System retest<br/>ambient temperature and repeated surge"]
G --> H["8 Parameter drift check<br/>leakage, VBR, clamp"]
H --> CSteps 3 and 6 are the ones most often skipped, and both are measurement rather than selection. They are also exactly what separates a design that looks compliant from one that is.
7. Bench verification: four questions and the step everyone skips
Main circuit surge practice follows the BMS bus surge bench closely (full criteria in how to verify the TVS on a BMS protection board). Three points are specific to the main circuit:
- Test coil flyback and bus surge together. Passing each alone and failing in combination is common, because contact bounce superimposes coil flyback onto bus L di/dt.
- Probe the pins of the protected device. Trace inductance times di/dt is not in the datasheet and only appears on the board.
- Recheck parameter drift after repeated surges. Every surge leaves microscopic damage in the junction, showing up over life as a higher leakage limit, slowly drifting
VBRand a higher clamp at high current. Continuously biased nodes deserve a look at TVS leakage and standby current.
Common pitfalls
| Pitfall | Symptom | Correct approach |
|---|---|---|
| Coil clamp placed at the drive MOSFET | MOSFET repeatedly destroyed, coil flyback unchanged | Put the clamp across the coil |
| Reading only the nominal surge rating | Moving to 8 kW leaves the residual untouched | Compare Vc at the target current |
| Judging pass at the TVS terminals | Clean waveform, MOSFET still fails | Move the probe to the protected device pins |
| Sharing the precharge relay with the main relay | Either no limiting or a small contact carrying high current | Keep the precharge branch separate |
| Using a flyback diode as the only coil clamp | Contactor opens slowly, safety loop responds late | Choose the clamp level from the allowed release time |
| Mixing waveform conventions | Using an 8/20 us Ipp against a 10/1000 us Vc | Lock one convention before comparing |
Related solutions
- How to select the TVS on a BMS protection board (the foldback anti-burn approach) -> BMS board burn and protection TVS selection
- The three voltage window checks on a 23S or 24S bus -> TVS fitted and the MOSFET still fails
- Layer by layer attribution of bus TVS failure -> Why does a BMS burn its MOSFETs
- Precharge resistor, relay and power-up sequence -> How to design a BMS precharge circuit
- Comparison of clamping methods for inductive turn-off spikes -> How to clamp a relay coil turn-off spike
- System level surge protection staging (MOV, GDT, TVS) -> How to design surge protection
- The three foldback TVS power tiers and representative models -> Foldback TVS family overview
- Selecting and paralleling the main circuit charge and discharge MOSFETs -> How to select BMS charge and discharge MOSFETs
FAQ
Q1: Which protection devices must a BMS main circuit have, and where do they go?
At least three positions. 1. A clamp across the bus, close to the main circuit MOSFET and busbar, covering L di/dt and residual coupled in from outside. 2. A clamp across the relay or contactor coil terminals, covering turn-off flyback, and note this is not at the drive MOSFET. 3. Current limiting plus timeout protection in the precharge branch, covering closing inrush. Add interface level protection if there is an external communication port, a sampling connector or a long harness. The placement rule is that the clamp belongs upstream in the energy dissipation path - as close to the energy source as possible and as close to the protected device as possible, and when those conflict, favour the energy source.
Q2: For relay coil turn-off flyback, should I use a flyback diode or a TVS?
Start from how fast the contactor must open. A flyback diode holds the coil at the lowest voltage, roughly 0.7 V forward drop plus the supply, but the coil current decays slowest and release is slowest. A diode in series with a Zener lets you set the clamp level and is the usual compromise. A foldback TVS gives the lowest clamp voltage at the same grade, so the drive MOSFET rating need not move up a grade while still meeting the release time. Coil flyback is single event, millijoule class energy, so a high power tier is unnecessary; size a small package for the energy and spend the power headroom on the bus.
Q3: My main circuit MOSFETs keep failing. Is the TVS power tier too low?
Probably not. Do two things first. Move the probe from the TVS terminals to the MOSFET drain and source to see the real residual, since trace inductance times di/dt is not in the datasheet. Then confirm the TVS clamping figure is taken at the target surge current rather than the single calibrated Ipp point. If the residual genuinely exceeds the downstream window, a higher power tier will not help - the AMSEMI -N series 3000 W / 5000 W / 8000 W tiers share identical VBR and maximum Vc at the same voltage grade and differ only in Ipp, which is 34.4 / 57.5 / 91.8 A at the 54 V grade. To lower the residual either move to a lower clamping part, about 20 percent lower for the foldback version at the same grade, or raise the downstream rating one grade.
Q4: If the main circuit already has surge protection, is precharge still needed?
Yes. The two handle entirely different transients. The bus TVS handles microsecond spikes with millijoule to joule class energy, while precharge handles the millisecond capacitor charging inrush with joule to tens of joules of energy, several orders of magnitude apart. Using a TVS to absorb precharge inrush does not work at the power level: charging a 1000 uF bus capacitance on a 48 V platform takes about 1.2 J, while one calibrated 10/1000 us pulse is millijoule class. On a BMS or inverter with a large bus capacitance, precharge is effectively mandatory.
Contact us
Shenzhen Intek Technology Co., Ltd is an authorised distributor for AMSEMI TVS and HOPERF CMT digital isolators, focused on low clamping and shallow foldback TVS protection for BMS boards, energy storage and telecom power. If you need a transient path breakdown for your main circuit topology, a bus clamping window calculation, the I-V curve and V_H / I_H data for a particular grade, or a combined coil flyback and bus surge bench plan, please contact us. Send the main circuit schematic, the relay or contactor model, the bus capacitance and the surge test standard, and we will check it against your actual operating conditions.
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Disclaimer: This article is technical and engineering exchange material covering how to protect the various transient classes on a BMS main circuit by path. It is not selection, procurement or business advice. The V_RWM / V_BR / V_c / Ipp conventions quoted here come from AMSEMI published datasheets (standard 5.0SMDJ series Doc. 8060014, -N foldback 5.0SMDJ series Doc. 8060055, -N foldback SMDJ series Doc. 8060084, -N foldback 8.0SMDJ series Doc. 8060057) and are all on the 10/1000 us convention with no 8/20 us data in those documents. Littelfuse 8x20 us figures are Littelfuse own published convention and are attributed as such; the two waveforms must never be converted into one another or subtracted. Coil flyback energy, trace inductance magnitudes, precharge inrush and temperature multipliers are engineering order of magnitude estimates and empirical rules rather than datasheet guarantees. Actual design must follow the datasheet of the chosen part, measured waveforms on the assembled unit, and the applicable system test standard.
