Why Does a TVS Leak More After Reflow, and Why Do Whole Batches Fail? How to Control SMB / SMC Packages, MSL and Soldering Stress

One-line conclusion: the leakage figure in a datasheet is a limit for a clean die at 25 C and a specified VRWM. A higher reading after assembly is usually not a bad part but one of three things - a package that absorbed moisture (MSL clock expired without a bake), soldering stress (thermal mismatch or board bending that micro-cracks the body or the joint), or ionic contamination around the pads creating surface leakage under bias and humidity. The order of diagnosis matters too: bake and re-test first to separate "wet" from "damaged", and only then talk about changing the part. One common belief also needs correcting: the package determines where heat goes, how much creepage you have and how much mechanical abuse the part survives - it does not determine clamping voltage. All three AMSEMI -N foldback grades (3000 W, 5000 W, 8000 W) use the same DO-214AB/SMC package and share identical VBR and maximum clamping voltage Vc at a given voltage grade; only the peak pulse current Ipp differs (34.4 / 57.5 / 91.8 A at the 54 V grade). "A bigger package clamps lower" is wrong; "a bigger package handles more abuse and runs cooler" is right.

1. Two questions that come up first

"The datasheet says 5 uA, our line measures 60 to 200 uA. Did we buy refurbished or counterfeit parts?"

Do not jump to that conclusion. Reverse leakage in a TVS is extremely sensitive to surface condition - it depends not only on the junction but on the passivation at the die edge, how much moisture the moulding compound has absorbed, and the invisible layer of flux residue between pads. The 5 uA in the datasheet is a maximum for a clean part at 25 C and a specified VRWM (both the AMSEMI 5.0SMDJ standard series and the -N foldback series are specified at 5 uA across the 54 to 95 V grades). It assumes three things: no absorbed moisture, no soldering damage, a clean board. Break any one of them and the reading climbs. Diagnose first, assign blame later.

"SMC is a bigger package, so does choosing SMC give better surge capability and lower clamping?"

Better abuse tolerance, yes. Lower clamping, no. Peak power comes from die area and structure; the package provides the thermal path, the creepage distance and the mechanical support. The clearest evidence is inside the AMSEMI family itself: SMDJ**CA-N (3000 W), 5.0SMDJ**CA-N (5000 W) and 8.0SMDJ**CA-N (8000 W) are all DO-214AB/SMC, and at the same voltage grade their VBR range and Vc are identical, with only Ipp differing. In other words, one package can hold three power grades - so guessing capability from package size will always mis-select, and changing package to lower the clamp is the wrong lever entirely (that requires a foldback structure, see the AMSEMI -N series cross-reference).

2. What each package actually governs

The three packages seen most often on BMS and storage boards are SMA, SMB and SMC (JEDEC DO-214AC / DO-214AA / DO-214AB):

Package	Body size (approx.)	Power grades seen in it	Where it belongs
SMA / DO-214AC	4.3 x 2.6 mm	400 W class (SMAJ type)	On-board signal ports, sense lines, low-voltage secondary nodes
SMB / DO-214AA	4.3 x 3.6 mm	600 W class (SMBJ type)	Comms ports, auxiliary supplies, low-energy transient points
SMC / DO-214AB	7.1 x 6.2 mm	1500 W to 8000 W (SMCJ / SMDJ / 5.0SMDJ / 8.0SMDJ)	Pack busbars, 48 V DC buses, main circuits

Sizes are typical JEDEC DO-214 body dimensions, useful only for judging scale and board space. Outline, land pattern and height per the manufacturer datasheet. The mapping between package and power grade is not one-to-one either - the last column gives the range a package can cover, not an equivalence.

Now the real difference between the three AMSEMI -N grades inside that one package (54 V grade, all on the 10/1000us convention):

Series	Peak power	Package	54 V grade: VBR / Vc / Ipp
SMDJ**CA-N	3000 W	DO-214AB / SMC	60.0-66.3 V / 69.6 V / 34.4 A
5.0SMDJ**CA-N	5000 W	DO-214AB / SMC	60.0-66.3 V / 69.6 V / 57.5 A
8.0SMDJ**CA-N	8000 W	DO-214AB / SMC	60.0-66.3 V / 69.6 V / 91.8 A

Convention note: VBR, Vc and Ipp above come from the AMSEMI datasheets (8060084 for SMDJ-N, 8060055 for 5.0SMDJ-N) and are all on the 10/1000us waveform; the datasheets contain no 8/20us data. Littelfuse 8x20us figures published elsewhere belong to Littelfuse's own parts and must be attributed explicitly; the two waveforms must never be mixed or subtracted. The 8000 W figures follow the manufacturer's published material - confirm against the latest datasheet.

That table answers two selection questions directly: upgrading the power grade at the same voltage does not improve clamping, it only raises survivable surge current; and improving clamping requires a different structure (standard to foldback), not a different package. The full reading of power grades and pulse derating is in What does the 5000 W rating on a TVS mean?.

3. The three things a package really governs

First, where the heat goes. Peak power is a microsecond event carried by die thermal mass, but repetitive pulses and steady-state margin depend on the package conducting heat into copper. An SMC body has more area and a larger thermal land, so junction-to-ambient thermal resistance is lower and temperature rise is smaller for the same average dissipation. Conversely, forcing a small package into a high-energy location may survive the first surge and drift by the two-hundredth - because sustained high junction temperature accelerates parameter drift, and leakage itself grows at roughly a doubling per 10 C (see Does the TVS drain the pack?), a positive feedback loop.

Second, creepage and clearance. On high-voltage nodes (48 V buses, 100 V-class BMS buses, PV side), a longer body and wider pin spacing give more surface creepage path. This only shows up under the combination of flux residue, humidity and long-term bias - and once surface leakage forms, it can far exceed the 5 uA of the die itself. So half the benefit of a large package at high voltage comes from heat, and half from surface distance.

Third, mechanical strength. A larger body puts more thermal-mismatch stress on the joints (the Z-axis CTE difference between moulding compound and FR-4 is on the order of 3 to 5 times), yet it has higher absolute resistance to bending. That is the trade-off: large package, more thermal stress; small package, less mechanical margin. The answer is not picking a package but layout - stay away from board edges, de-panelling zones and screw holes.

4. Leakage after reflow: separate "wet" from "damaged"

This is the single most useful action in the article. Do not suspect the part first, and do not return the whole batch first - use temperature to split the two mechanisms:

Bake-and-retest. Take 5 to 10 suspect units, bake at 125 C for 24 hours (exact temperature and duration per J-STD-033 and the part label; thick-bodied SMC parts usually fall in the stricter band), cool in the oven to room temperature and immediately re-measure IR at the same bias (for example leakage at VRWM).

• Reading drops clearly, close to the datasheet order of magnitude - the mechanism is absorbed moisture or surface ionic contamination. The part is not damaged; the problem is storage, the open-bag clock, shop-floor humidity or the cleaning process.
• Reading barely moves, still tens or hundreds of microamps - the mechanism is damage: micro-cracking from reflow stress, cracked joints, damaged edge passivation, or electrical overstress after power-up. Only now do you investigate the part and the reflow profile.

flowchart TD
    A["Symptom: high IR after assembly / batch failures / leakage jump at temperature"] --> B["Sample 5-10 units<br/>record room-temperature IR at VR"]
    B --> C["Bake 125 C for 24 h<br/>cool in oven to room temperature"]
    C --> D["Re-measure IR at VR immediately"]
    D --> E{"Reading drops clearly?"}
    E -- "Yes" --> F["Moisture / ionic contamination<br/>check open-bag clock, humidity, cleaning and flux residue"]
    E -- "No" --> G["Damage<br/>check reflow profile, second reflow, de-panelling and bending, EOS"]
    F --> H["Fix: bake per J-STD-033 before use<br/>tighter cleaning / conformal coat / shorter exposure"]
    G --> I["Fix: measure profile at two points (joint and body)<br/>move layout out of stress zones / review surge and EOS paths"]
    H --> J["Release small batch after retest<br/>add high-temperature IR sampling"]
    I --> J

Symptom-based attribution narrows it faster:

Symptom	Most likely mechanism	First verification step
Whole batch slightly high, drops after bake	Absorbed moisture (MSL expired) or high shop humidity	Check open date and humidity indicator card, reproduce the bake
A few boards high, always the same location	Poor joint at that spot, or a nearby contamination source	Microscope the joint and body, run ionic cleanliness
Leakage jumps hot, normal cold	Micro-crack in the body or damaged passivation	Temperature cycling with IR tracking, cross-section
Fails on power-up, dead short	Electrical overstress rather than process	Check the surge path and whether the clamp is out of window

The table is an engineering guide, not a pass/fail criterion; confirming the root cause needs cross-section, X-ray or ion chromatography.

5. MSL is an open-bag clock, not a packaging grade

Moisture Sensitivity Level is most often misread as "how good the packaging is". What it really means is how long a part may sit in the shop environment after the vacuum bag is opened, after which it must be baked before reflow. Absorbed moisture flashes to steam in the oven - the popcorn effect - delaminating and cracking the moulding compound. The visible result is higher leakage, drifted VBR, and in bad cases an open circuit.

MSL	Floor life after opening	If exceeded
MSL 1	Unlimited	No bake needed
MSL 2 / 2a	1 year / 4 weeks	Bake per J-STD-033
MSL 3	168 hours	Bake, then restart the clock
MSL 4	72 hours	Bake, then restart the clock
MSL 5 / 5a	48 / 24 hours	Must bake; shorten exposure further

Levels and durations follow the general J-STD-033 convention; the part label, humidity indicator card and manufacturer instructions govern. Bake conditions differ with body thickness - do not transfer one band to another.

Three shop-floor actions work best: label at the moment of opening (date, shift, remaining quantity) so the clock is visible; read the humidity indicator card rather than feeling the bag, since a colour change means bake; and bake whenever a line stop exceeds the floor life - do not release parts because they "look dry". Moisture is invisible, and by the time it becomes a crack in the oven it is too late.

6. Reflow profile: two traps that come with a large body

Lead-free processes (SAC305 class) melt around 217 to 220 C, with peak temperatures typically in the 245 to 260 C band (the actual window per J-STD-020 and the part label, banded by body thickness). Large SMC bodies carry two specific risks:

Zone	Parameters to watch	The large-body problem
Preheat / soak	Ramp rate, soak time, flux activation	More thermal mass, so the body heats more slowly than small parts
Reflow	Peak temperature, time above liquidus	Joint melts first, body arrives late - false wetting
Cooling	Cooling rate	Too fast increases mismatch stress between body and joint
Second reflow	Reheating during the second side	An already-soldered large body is baked twice; moisture-exposed parts fail here

So put the thermocouple in two places: on a joint and on the part body surface. A joint-only profile looks like a textbook curve while the body experiences something quite different - this is the usual origin of "all the small parts are fine, one large package has a cold joint". On double-sided assemblies, place SMC parts on the side that reflows first so they see one pass fewer.

7. Mechanical stress: the hardest batch failure to find

The hardest process problems are rarely thermal; they are mechanical. A TVS usually sits at the bus entry, next to a connector, near the board edge - exactly where mechanical stress concentrates. Common sources:

1. De-panelling (V-score or routing): stress travels along the board edge, and parts close to it are at risk of the body cracking at the pin root.
2. Board bending during assembly: bending near screw holes shears large-package joints repeatedly, producing intermittent opens or jumping leakage - the kind of fault a room-temperature static test never catches.
3. Potting and conformal coat cure shrinkage: shrinkage transfers stress straight into the body, especially with thick layers and fast cure.
4. Connector mating: insertion force travels through copper to nearby TVS lands - the classic "passes at build, fails after a few customer insertions" path.

The fix is not a different part but three layout rules: keep distance from board edges and de-panelling lines, stay out of screw-hole and high-bend zones, and orient the long axis of large packages along the neutral axis of bending; add copper as a stress buffer outside the land if needed. If the same location keeps failing, suspect layout before changing brands.

One more, directly tied to high voltage: flux residue plus humidity plus long-term bias equals electrochemical migration. On a 100 V-class bus that surface leakage can far exceed the die's 5 uA, presenting as "fine after cleaning, back a few months later". Cleaning and conformal coating are not optional on high-voltage BMS boards.

8. Four gates that keep process risk off the line

Gate	Action	Criterion
Incoming	Check bag integrity, humidity indicator card, MSL label and lot	Card changed means bake; lot traceable
Line start	Open-bag clock, bake when expired, record bake temperature and time	Floor life not exceeded; bake records available
Reflow	Measured profile at two points (joint and body), assess second reflow	Peak and time above liquidus inside the J-STD-020 window
Outgoing	Room-temperature IR sampling plus high-temperature IR sampling (85 C class)	Hot reading follows the temperature trend, no abnormal jump

The fourth gate is the one most often skipped, yet it is the only way to expose the "micro-crack plus moisture" combination before shipping - a part that passes cold can leak tens of times more at 85 C, and a damaged part deviates from the normal multiplier. This is the same logic as the leakage and drift checks in How to validate a BMS TVS: measuring once at room temperature is the same as not measuring.

9. Five common traps

Trap	Consequence	Correct approach
Inferring power grade from package size	Picking a part that looks big enough but is not	Read power and Ipp from the part number; one package spans three grades
Expecting a bigger package to clamp lower	Re-spin and re-qualify for zero change in Vc	Lower clamping needs a foldback structure; package does not change Vc
No open-bag clock, releasing parts that "look dry"	Batch leakage or opens after reflow	Track MSL, bake when expired, read the indicator card
Measuring the profile at the joint only	Cold joints and false wetting on large bodies	Two-point measurement, joint and body
Returning the batch the moment leakage is high	Same problem with the replacement part	Bake-and-retest first to separate moisture from damage

Related solutions

• Selection guide for busbars: How to select TVS for BMS protection boards
• Full model and grade list: AMSEMI foldback TVS models and cross-reference
• Reading the power rating: What does the 5000 W rating mean?
• Leakage and long-term bias: Does the TVS drain the pack?
• Bench validation and drift: How to validate a BMS TVS
• Why the parts are reliable at all: GPP glass passivation at AMSEMI (Chinese)
• Paralleling and series use: Can TVS parts be paralleled or stacked?

FAQ

Q1: The TVS leaks far more after assembly than the datasheet says. Is the part bad?

Usually not. The 5 uA figure (AMSEMI 5.0SMDJ standard and -N foldback, 54 to 95 V grades, 25 C maximum) assumes no absorbed moisture, no soldering damage and a clean board. Break any assumption and the reading rises. Bake 5 to 10 samples at 125 C for 24 hours, cool in the oven and re-measure IR: a clear drop means moisture or ionic contamination, no change means reflow cracking, damaged passivation or electrical overstress. Separate the mechanism before changing the part, or the same problem follows the new part.

Q2: Does an SMC package handle surges better than SMB, and does it lower the clamping voltage?

Better abuse tolerance, yes; lower clamping, no. Peak power comes from die area and structure, while the package provides thermal path, creepage and mechanical support. The AMSEMI -N family uses DO-214AB/SMC for all three grades - SMDJ**CA-N (3000 W), 5.0SMDJ**CA-N (5000 W) and 8.0SMDJ**CA-N (8000 W) - with identical VBR and Vc at the same voltage grade and only Ipp differing (34.4 / 57.5 / 91.8 A at 54 V, 10/1000us). Lower clamping requires a foldback structure.

Q3: What is MSL, and how long may a TVS sit after the bag is opened?

MSL is the floor-life clock that starts when the vacuum bag is opened, not a packaging quality grade. On the general J-STD-033 convention: MSL 2 about one year, MSL 3 168 hours, MSL 4 72 hours, MSL 5 48 hours, MSL 5a 24 hours; exceeding it requires a bake and a restarted clock. Moisture absorbed into the body flashes to steam during reflow, delaminating and cracking the compound (popcorn effect), which shows up as higher leakage, drifted VBR or an open. Levels and bake conditions per the part label, humidity indicator card and manufacturer instructions.

Q4: Why do small parts solder fine while an SMC TVS shows a cold joint or excess leakage?

Because a large body has more thermal mass. During reflow the joint reaches temperature and melts while the body lags, producing false wetting; a joint-only profile cannot show this, so a second thermocouple on the body surface is required. On double-sided assemblies the large part also sees a second reflow, where moisture-exposed units fail. Add de-panelling, bending, screw and potting stress, and an SMC part near a board edge easily develops micro-cracks and intermittent opens - faults that room-temperature static tests miss and that need high-temperature IR sampling or temperature cycling to expose.

Contact us

Package and assembly questions come down to matching what the part can do with what the line can do: enough energy, a thermal path out, enough surface distance, and a process that can solder it cleanly and undamaged. Answering only the first two is how projects end up "fully compliant on paper, failing in production".

Send us your maximum bus voltage and cell count, the TVS part number and package, the failure rate with measured IR values (cold and hot), the reflow peak temperature and whether the board is double-sided, and we will review package selection, thermal margin and process attribution together - and tell you whether the answer is a different package, a different structure, or a process change. Datasheet pages, package drawings, samples and FAE review for the AMSEMI 5.0SMDJ standard and -N shallow foldback (snap-back) series are available on request. Contact us.

Shenzhen Intek Technology Co., Ltd - authorised distributor of AMSEMI (Anhui Anmei Semiconductor) TVS and HOPERF CMT series digital isolators Tel / WeChat: +86 136-3264-8484 Address: Floor 4, Building 2, Jingwei Center, 309 Ping'an Avenue, Pinghu Street, Longgang District, Shenzhen, China Website: www.intek.vip

---

Disclaimer: This article is technical and industry commentary for reference only. It does not constitute selection, procurement or any other business advice. Device parameters (VBR, Vc, Ipp, IR) and package information are subject to the latest manufacturer datasheets and actual measurements: AMSEMI 5.0SMDJ figures (datasheets 8060014 for the standard series, 8060055 for the -N foldback series) follow the 10/1000us waveform and the datasheets contain no 8/20us data; Littelfuse 8x20us figures are that company's own published convention. MSL levels, bake conditions and reflow windows follow the general J-STD-033 / J-STD-020 convention - the part label, manufacturer instructions and measured profiles govern the actual numbers. Statements such as "CTE differs by 3 to 5 times" and "leakage doubles per 10 C" are engineering order-of-magnitude descriptions, not datasheet guarantees. Work on high-voltage circuits and battery packs should be carried out by qualified personnel.